Please note that significant changes to LETG/ACIS setup recommendations were made in late 2015 as a result of increased aimpoint scatter and moving the spectrum to the center of the array.
This page is intended to aid proposers and observers as they select instrumental parameters for LETG/ACIS-S observations, specifically with regard to pointing offsets and subarray configurations. Most of the information presented here is also in the Proposer's Observatory Guide (see especially Table 9.3 and section 9.4.2/Offset Pointing). The additional contributions of this page are specific subarray configurations and links to the Spectrum Visualization Tool.
The default for the SIM Offset is now 0 (formerly -8 mm) in order to maximize effective area at energies below ~1 keV. With this SIM Offset value the spectrum will fall in the middle of the CCD array, around row 512.
Why is this change being made?
The Spectrum Visualization Tool displays where spectral features fall on the ACIS-S detector as a function of Y-offset and source redshift. Positions are only approximate, however, because of aimpoint scatter, which can be up to ±20" (0.33'). One arcminute of Y-offset corresponds to a shift of 3.36 Å. When choosing an offset, observers should keep several margins in mind:
|Figure 1: LETGS 1st order effective area (EA) with ACIS-S and HRC-S; lower panel shows low-EA regions in more detail. The effects of dither and ACIS bad columns are explicitly included. Dotted lines mark ACIS chip boundaries, and HRC plate gaps appear near -53 and +65 Å. ACIS curve is for Y-offset=+1.1' and HRC curve is for Y-offset=0'. The darker ACIS curve is for SIM Offset=0 (placing the spectrum near row 512); the lighter curve is for SIM Offset=-8 mm (row 180). ACIS EAs are taken from fall 2015.||Figure 2: Effective areas at different ACIS rows, normalized to row 180. Contaminant on the UV/Ion Shield is thinner toward the middle of the array, yielding higher X-ray transmission and EA.|
Very few LETG/ACIS observations use the full ACIS-S array, which has 1024 rows and takes 3.2 seconds to read out. Using a subarray and/or fewer than 6 chips allows a faster readout (shorter frametime) and thus produces less pileup in 0th order and the dispersed spectrum.
From Figure 1 one can see that S0 and S5 are useless for detecting 1st-order photons, although they may be useful for collecting higher order spectra in some cases. The S4 chip is also unlikely to be useful. Because of increasingly stringent ACIS thermal requirements, the S0 and S5 chips should be turned off unless there is a good reason for their use. Note that chips can be marked as "Optional", in which case they will be only be turned on if Mission Planning schedulers determine that thermal constraints will not be violated.
The LETG/ACIS background is weak enough that observers often don't bother with background subtraction. In this case, a subarray as small as 128 rows can be used although this leaves very little margin for error: 10 pixels are needed for the standard |tg_d|<0.0008 deg spectral extraction region, 32 pixels for dithered edges, and 80 pixels for pointing errors of up to ±20", summing to 122 pixels. If background subtraction is to be used, a subarray of at least ~200 pixels is needed to fill the default background regions which extend to 1.06 mm on either side of the spectrum (total edge-to-edge width of 88 pixels and net 75 pixels of background vs the spectral width of 10 pixels). Alternatively, users may reprocess their data by specifying narrower background regions in tg_extract.
To summarize, 3 or 4 chips will suffice for most observers.
A 128-row subarray is probably OK but there will be little room
for background regions. If you want to use
the standard background regions you should use at least 280 rows,
although custom background regions can be specified to use
whatever area is available.
The tables below list subarray parameters for the
traditional 1/2, 1/4, and 1/8 subarrays,
and for optimized subarrays that maximize the
number of rows for a given frametime.
SIM Offset=0 and Z-Offset=0 are assumed.
|CCDs||3 chips||4 chips|
|CCDs||5 chips||6 chips|
|CCDs||3 chips||4 chips||5 chips||6 chips|
Frametime for m active CCDs, using n rows starting with row q, is given by the equation
T(msec) = 41.12*m + 2.85*n + 0.040*m*q - 32.99
and rounding up to the nearest 0.1 sec.
Last modified: 03/23/16
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