The present targets for the Total and Cold times are:
Total time per SI Mode per measurement: 7600.0 seconds
Fraction of total time the measurement should be cold: 60.0%
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Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Expected Time (secs) | 60800 | 45600 | 68400 |
Total Actual Time (secs) | 74560 | 57500 | 84877 |
Delta From Expected (secs) | 13760.00 | 11901.00 | 16477.00 |
% of Expected Total (secs) | 122.63% | 126.10% | 124.09% |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Exp. Cold Time (secs) | 36480.0 | 27360.0 | 41040.0 |
Total Actual Cold Time (secs) | 22315 | 32795 | 27868 |
Delta From Expected (secs) | -14164.72 | 5435.65 | -13171.02 |
% of Exp. Cold Total (secs) | 61.17% | 119.87% | 67.91% |
SI Mode | Total Number of Obs. | Total Exposure Time (sec) | Average Exposure (sec/obs) | |
---|---|---|---|---|
Primary 6 Chip SI Modes | TE_007AC | 7 | 65748.00 | 9392.57 |
TE_007AE | 6 | 57501.00 | 9583.50 | |
TE_00B26 | 8 | 75160.00 | 9395.00 | Old 6 Chip SI Modes | TE_00216 | 0 | 0.00 | 0.00 |
TE_0021C | 0 | 0.00 | 0.00 | |
TE_008EA | 0 | 0.00 | 0.00 | 5 Chip SI Modes | TE_00C60 | 2 | 18529.00 | 9264.50 |
TE_00CA8 | 0 | 0.00 | 0.00 | 4 Chip SI Modes | TE_00C62 | 0 | 0.00 | 0.00 |
III. Statistics Since the Start of the Current Epoch
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Expected Time (secs) | 60800 | 38000 | 53200 |
Total Actual Time (secs) | 74560 | 47784 | 66874 |
Delta From Expected (secs) | 13760.00 | 9784.00 | 13674.00 |
% of Expected Total (secs) | 122.63% | 125.75% | 125.70% |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Exp. Cold Time (secs) | 36480.0 | 22800.0 | 31920.0 |
Total Actual Cold Time (secs) | 22315 | 23115 | 18121 |
Delta From Expected (secs) | -14164.72 | 315.55 | -13798.77 |
% of Exp. Cold Total (secs) | 61.17% | 101.38% | 56.77% |
SI Mode | Total Number of Obs. | Total Exposure Time (sec) | Average Exposure (sec/obs) | |
---|---|---|---|---|
Primary 6 Chip SI Modes | TE_007AC | 7 | 65748.00 | 9392.57 |
TE_007AE | 5 | 47784.00 | 9556.80 | |
TE_00B26 | 6 | 57157.00 | 9526.17 | Old 6 Chip SI Modes | TE_00216 | 0 | 0.00 | 0.00 |
TE_0021C | 0 | 0.00 | 0.00 | |
TE_008EA | 0 | 0.00 | 0.00 | 5 Chip SI Modes | TE_00C60 | 2 | 18529.00 | 9264.50 |
TE_00CA8 | 0 | 0.00 | 0.00 | 4 Chip SI Modes | TE_00C62 | 0 | 0.00 | 0.00 |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Expected Time (secs) | 3648000 | 3602400 | 3602400 |
Total Actual Time (secs) | 3995622 | 3883783 | 3990354 |
Delta From Expected (secs) | 347622.52 | 281383.04 | 387954.65 |
% of Expected Total (secs) | 109.53% | 107.81% | 110.77% |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Exp. Cold Time (secs) | 2188800.0 | 2161440.0 | 2161440.0 |
Total Actual Cold Time (secs) | 1986726 | 1931473 | 1875315 |
Delta From Expected (secs) | -202073.91 | -229966.02 | -286124.24 |
% of Exp. Cold Total (secs) | 90.77% | 89.36% | 86.76% |
SI Mode | Total Number of Obs. | Total Exposure Time (sec) | Average Exposure (sec/obs) | |
---|---|---|---|---|
Primary 6 Chip SI Modes | TE_007AC | 477 | 3935842.52 | 8251.24 |
TE_007AE | 472 | 3867973.04 | 8194.86 | |
TE_00B26 | 469 | 3840146.93 | 8187.95 | Old 6 Chip SI Modes | TE_00216 | 5 | 478338.25 | 95667.65 |
TE_0021C | 0 | 0.00 | 0.00 | |
TE_008EA | 0 | 0.00 | 0.00 | 5 Chip SI Modes | TE_00C60 | 5 | 42461.00 | 8492.20 |
TE_00CA8 | 2 | 15810.00 | 7905.00 | 4 Chip SI Modes | TE_00C62 | 3 | 167526.73 | 55842.24 |
A word about the COLD Time stats:
- The Total Expected Cold Time value in the table below is 60.0% of the Total Expected Time (see Table above).
- Total Actual Cold Time is the sum of all time during each measurement where the temperature was <= -118.7 degrees C
- % of Expected Total is the fraction of the Total Expected Time achieved
SI Mode Mapping between 6,5 and 4 chip modes:
The 6 chip SI Modes consist of three distinct modes. But there are only 2, 5 chip SI Modes and only one 4 chip SI mode. To make tracking feasible, the 4 and 5 chip modes were mapped into the 6 chip modes in the following manner:
6 chip 5 chip 4 chip
TE_007AC -> TE_00C60 TE_00C62
TE_00B26 -> TE_00C60 TE_00C62
TE_007AE -> TE_00CA8
All of the TE_00CA8s get counted as TE_007AE
Half of the TE_00C60s get counted towards TE_007AC and the other half get counted with the TE_00B26s
Half of the TE_00C62s get counted towards TE_007AC and the other half get counted with the TE_00B26s.
So watchout for TE_00B26 over-representation.
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