The present targets for the Total and Cold times are:
Total time per SI Mode per measurement: 7600.0 seconds
Fraction of total time the measurement should be cold: 60.0%
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Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Expected Time (secs) | 38000 | 76000 | 60800 |
Total Actual Time (secs) | 28916 | 58284 | 46220 |
Delta From Expected (secs) | -9083.00 | -17715.00 | -14579.00 |
% of Expected Total (secs) | 76.10% | 76.69% | 76.02% |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Exp. Cold Time (secs) | 22800.0 | 45600.0 | 36480.0 |
Total Actual Cold Time (secs) | 6602 | 20396 | 10649 |
Delta From Expected (secs) | -16197.21 | -25203.52 | -25830.76 |
% of Exp. Cold Total (secs) | 28.96% | 44.73% | 29.19% |
SI Mode | Total Number of Obs. | Total Exposure Time (sec) | Average Exposure (sec/obs) | |
---|---|---|---|---|
Primary 6 Chip SI Modes | TE_007AC | 5 | 28917.00 | 5783.40 |
TE_007AE | 9 | 53454.00 | 5939.33 | |
TE_00B26 | 8 | 46221.00 | 5777.62 | Old 6 Chip SI Modes | TE_00216 | 0 | 0.00 | 0.00 |
TE_0021C | 0 | 0.00 | 0.00 | |
TE_008EA | 0 | 0.00 | 0.00 | 5 Chip SI Modes | TE_00C60 | 0 | 0.00 | 0.00 |
TE_00CA8 | 1 | 4831.00 | 4831.00 | 4 Chip SI Modes | TE_00C62 | 0 | 0.00 | 0.00 |
III. Statistics Since the Start of the Current Epoch
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Expected Time (secs) | 22800 | 45600 | 38000 |
Total Actual Time (secs) | 16871 | 32064 | 26839 |
Delta From Expected (secs) | -5928.00 | -13535.00 | -11161.00 |
% of Expected Total (secs) | 74.00% | 70.32% | 70.63% |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Exp. Cold Time (secs) | 13680.0 | 27360.0 | 22800.0 |
Total Actual Cold Time (secs) | 0 | 20396 | 10649 |
Delta From Expected (secs) | -13680.00 | -6963.52 | -12150.76 |
% of Exp. Cold Total (secs) | 0.00% | 74.55% | 46.71% |
SI Mode | Total Number of Obs. | Total Exposure Time (sec) | Average Exposure (sec/obs) | |
---|---|---|---|---|
Primary 6 Chip SI Modes | TE_007AC | 3 | 16872.00 | 5624.00 |
TE_007AE | 5 | 27234.00 | 5446.80 | |
TE_00B26 | 5 | 26839.00 | 5367.80 | Old 6 Chip SI Modes | TE_00216 | 0 | 0.00 | 0.00 |
TE_0021C | 0 | 0.00 | 0.00 | |
TE_008EA | 0 | 0.00 | 0.00 | 5 Chip SI Modes | TE_00C60 | 0 | 0.00 | 0.00 |
TE_00CA8 | 1 | 4831.00 | 4831.00 | 4 Chip SI Modes | TE_00C62 | 0 | 0.00 | 0.00 |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Expected Time (secs) | 3769600 | 3777200 | 3792400 |
Total Actual Time (secs) | 4116441 | 4049341 | 4174702 |
Delta From Expected (secs) | 346841.52 | 272141.04 | 382302.65 |
% of Expected Total (secs) | 109.20% | 107.20% | 110.08% |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Exp. Cold Time (secs) | 2261760.0 | 2266320.0 | 2275440.0 |
Total Actual Cold Time (secs) | 2012159 | 1980623 | 1924026 |
Delta From Expected (secs) | -249600.84 | -285696.76 | -351413.16 |
% of Exp. Cold Total (secs) | 88.96% | 87.39% | 84.56% |
SI Mode | Total Number of Obs. | Total Exposure Time (sec) | Average Exposure (sec/obs) | |
---|---|---|---|---|
Primary 6 Chip SI Modes | TE_007AC | 489 | 4020883.52 | 8222.67 |
TE_007AE | 489 | 3986264.04 | 8151.87 | |
TE_00B26 | 490 | 3994521.93 | 8152.09 | Old 6 Chip SI Modes | TE_00216 | 5 | 478338.25 | 95667.65 |
TE_0021C | 0 | 0.00 | 0.00 | |
TE_008EA | 0 | 0.00 | 0.00 | 5 Chip SI Modes | TE_00C60 | 13 | 108212.00 | 8324.00 |
TE_00CA8 | 8 | 63077.00 | 7884.63 | 4 Chip SI Modes | TE_00C62 | 3 | 167526.73 | 55842.24 |
A word about the COLD Time stats:
- The Total Expected Cold Time value in the table below is 60.0% of the Total Expected Time (see Table above).
- Total Actual Cold Time is the sum of all time during each measurement where the temperature was <= -118.7 degrees C
- % of Expected Total is the fraction of the Total Expected Time achieved
SI Mode Mapping between 6,5 and 4 chip modes:
The 6 chip SI Modes consist of three distinct modes. But there are only 2, 5 chip SI Modes and only one 4 chip SI mode. To make tracking feasible, the 4 and 5 chip modes were mapped into the 6 chip modes in the following manner:
6 chip 5 chip 4 chip
TE_007AC -> TE_00C60 TE_00C62
TE_00B26 -> TE_00C60 TE_00C62
TE_007AE -> TE_00CA8
All of the TE_00CA8s get counted as TE_007AE
Half of the TE_00C60s get counted towards TE_007AC and the other half get counted with the TE_00B26s
Half of the TE_00C62s get counted towards TE_007AC and the other half get counted with the TE_00B26s.
So watchout for TE_00B26 over-representation.
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