The present targets for the Total and Cold times are:
Total time per SI Mode per measurement: 7600.0 seconds
Fraction of total time the measurement should be cold: 60.0%
Back To Top
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Expected Time (secs) | 30400 | 68400 | 68400 |
Total Actual Time (secs) | 22274 | 55284 | 49955 |
Delta From Expected (secs) | -8125.00 | -13115.00 | -18444.00 |
% of Expected Total (secs) | 73.27% | 80.83% | 73.04% |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Exp. Cold Time (secs) | 18240.0 | 41040.0 | 41040.0 |
Total Actual Cold Time (secs) | 0 | 20396 | 15403 |
Delta From Expected (secs) | -18240.00 | -20643.52 | -25636.56 |
% of Exp. Cold Total (secs) | 0.00% | 49.70% | 37.53% |
SI Mode | Total Number of Obs. | Total Exposure Time (sec) | Average Exposure (sec/obs) | |
---|---|---|---|---|
Primary 6 Chip SI Modes | TE_007AC | 4 | 22275.00 | 5568.75 |
TE_007AE | 7 | 40737.00 | 5819.57 | |
TE_00B26 | 9 | 49956.00 | 5550.67 | Old 6 Chip SI Modes | TE_00216 | 0 | 0.00 | 0.00 |
TE_0021C | 0 | 0.00 | 0.00 | |
TE_008EA | 0 | 0.00 | 0.00 | 5 Chip SI Modes | TE_00C60 | 0 | 0.00 | 0.00 |
TE_00CA8 | 2 | 14548.00 | 7274.00 | 4 Chip SI Modes | TE_00C62 | 0 | 0.00 | 0.00 |
III. Statistics Since the Start of the Current Epoch
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Expected Time (secs) | 22800 | 60800 | 53200 |
Total Actual Time (secs) | 16871 | 48652 | 38367 |
Delta From Expected (secs) | -5928.00 | -12147.00 | -14833.00 |
% of Expected Total (secs) | 74.00% | 80.02% | 72.12% |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Exp. Cold Time (secs) | 13680.0 | 36480.0 | 31920.0 |
Total Actual Cold Time (secs) | 0 | 20396 | 15403 |
Delta From Expected (secs) | -13680.00 | -16083.52 | -16516.56 |
% of Exp. Cold Total (secs) | 0.00% | 55.91% | 48.26% |
SI Mode | Total Number of Obs. | Total Exposure Time (sec) | Average Exposure (sec/obs) | |
---|---|---|---|---|
Primary 6 Chip SI Modes | TE_007AC | 3 | 16872.00 | 5624.00 |
TE_007AE | 6 | 34105.00 | 5684.17 | |
TE_00B26 | 7 | 38367.00 | 5481.00 | Old 6 Chip SI Modes | TE_00216 | 0 | 0.00 | 0.00 |
TE_0021C | 0 | 0.00 | 0.00 | |
TE_008EA | 0 | 0.00 | 0.00 | 5 Chip SI Modes | TE_00C60 | 0 | 0.00 | 0.00 |
TE_00CA8 | 2 | 14548.00 | 7274.00 | 4 Chip SI Modes | TE_00C62 | 0 | 0.00 | 0.00 |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Expected Time (secs) | 3769600 | 3792400 | 3807600 |
Total Actual Time (secs) | 4116441 | 4065929 | 4186230 |
Delta From Expected (secs) | 346841.52 | 273529.04 | 378630.65 |
% of Expected Total (secs) | 109.20% | 107.21% | 109.94% |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Exp. Cold Time (secs) | 2261760.0 | 2275440.0 | 2284560.0 |
Total Actual Cold Time (secs) | 2012159 | 1980623 | 1928781 |
Delta From Expected (secs) | -249600.84 | -294816.76 | -355778.95 |
% of Exp. Cold Total (secs) | 88.96% | 87.04% | 84.43% |
SI Mode | Total Number of Obs. | Total Exposure Time (sec) | Average Exposure (sec/obs) | |
---|---|---|---|---|
Primary 6 Chip SI Modes | TE_007AC | 489 | 4020883.52 | 8222.67 |
TE_007AE | 490 | 3993135.04 | 8149.26 | |
TE_00B26 | 492 | 4006049.93 | 8142.38 | Old 6 Chip SI Modes | TE_00216 | 5 | 478338.25 | 95667.65 |
TE_0021C | 0 | 0.00 | 0.00 | |
TE_008EA | 0 | 0.00 | 0.00 | 5 Chip SI Modes | TE_00C60 | 13 | 108212.00 | 8324.00 |
TE_00CA8 | 9 | 72794.00 | 8088.22 | 4 Chip SI Modes | TE_00C62 | 3 | 167526.73 | 55842.24 |
A word about the COLD Time stats:
- The Total Expected Cold Time value in the table below is 60.0% of the Total Expected Time (see Table above).
- Total Actual Cold Time is the sum of all time during each measurement where the temperature was <= -118.7 degrees C
- % of Expected Total is the fraction of the Total Expected Time achieved
SI Mode Mapping between 6,5 and 4 chip modes:
The 6 chip SI Modes consist of three distinct modes. But there are only 2, 5 chip SI Modes and only one 4 chip SI mode. To make tracking feasible, the 4 and 5 chip modes were mapped into the 6 chip modes in the following manner:
6 chip 5 chip 4 chip
TE_007AC -> TE_00C60 TE_00C62
TE_00B26 -> TE_00C60 TE_00C62
TE_007AE -> TE_00CA8
All of the TE_00CA8s get counted as TE_007AE
Half of the TE_00C60s get counted towards TE_007AC and the other half get counted with the TE_00B26s
Half of the TE_00C62s get counted towards TE_007AC and the other half get counted with the TE_00B26s.
So watchout for TE_00B26 over-representation.
Back To Top